Nanosheet field effect transistors (FETs) are an attractive alternative to Fin FETs or planar devices for future CMOS nodes. In typical nanosheet FET approach, a single material nanosheet is used, since for electrostatic control very thin nanosheets are targeted. It is difficult to strain the nanosheet, which would boost mobility for many materials, including Si, SiGe or Ge nanosheets. A method to effectively achieve strained nanosheets would be beneficial for CMOS scaling.
In addition, quantum well channels in which the carriers are restricted mainly to one or some layers (arranged in epitaxial relation with each other), by a potential barrier at the interfaces with adjacent crystalline (epitaxially arranged) layers can give an advantage in transport. A method to effectively achieve QW structured nanosheets would be beneficial for CMOS scaling.